基于Al2O3/Chitosan叠层栅介质的双栅IGZO神经形态晶体管

doi:10.15541/jim20220767

无机材料学报 ›› 2023, Vol. 38 ›› Issue (4): 445-451.DOI: 10.15541/jim20220767

• 专栏：神经形态材料与器件(特邀编辑：万青) • 上一篇下一篇

基于Al₂O₃/Chitosan叠层栅介质的双栅IGZO神经形态晶体管

王靖瑜¹(), 万昌锦¹, 万青¹^,²()

1.南京大学电子科学与工程学院, 南京 210093
2.浙江大学微纳电子学院, 杭州 310027

收稿日期:2022-12-21 修回日期:2023-01-17 出版日期:2023-04-20 网络出版日期:2023-02-07
通讯作者: 万青, 教授. E-mail: wanqing@nju.edu.cn
作者简介:王靖瑜(1998-), 女, 硕士研究生. E-mail: m13233021990@163.com
基金资助:
国家重点研发计划(2019YFB2205400);国家自然科学基金(62074075);国家自然科学基金(61834001)

Dual-gate IGZO-based Neuromorphic Transistors with Stacked Al₂O₃/Chitosan Gate Dielectrics

WANG Jingyu¹(), WAN Changjin¹, WAN Qing¹^,²()

1. School of Electronic Science and Engineering, Nanjing University, Nanjing 210093, China
2. School of Micro-Nano Electronics, Zhejiang University, Hangzhou 310027, China

Received:2022-12-21 Revised:2023-01-17 Published:2023-04-20 Online:2023-02-07
Contact: WAN Qing, professor. E-mail: wanqing@nju.edu.cn
About author:WANG Jingyu (1998-), female, Master candidate. E-mail: m13233021990@163.com
Supported by:
National Key Research and Development Program(2019YFB2205400);National Natural Science Foundation of China(62074075);National Natural Science Foundation of China(61834001)

摘要/Abstract

摘要：

基于铟镓锌氧(IGZO)的双电层(EDL)晶体管以低加工温度、良好的一致性以及丰富的离子动力学等优势, 在神经形态感知和计算系统中具有极大的潜在应用前景。然而, 双电层IGZO晶体管的高漏电(>10 nA)导致的高能耗以及异常电流尖峰/毛刺一直是相关神经形态计算发展的主要障碍之一。本研究提出了一种具有Al₂O₃/壳聚糖(Chitosan)叠层栅介质的新型IGZO神经形态晶体管。与单层壳聚糖栅介质晶体管相比, 引入Al₂O₃叠层的器件具有78.3 mV/decade的低亚阈值摆幅, 在1.8 V电压下1.3 nA的低漏电流(降低约98%), 3.73 V的大滞回窗口(提升3.4倍)以及0.86 nA的低兴奋性突触后电流(降低约97%), 单脉冲(0.5 V, 20 ms)功耗仅为1.7 pJ(降低约96%)。此外, 研究还基于双栅EDL协同调控实现了尖峰突触功能的模拟和沟道电流的有效调制, 并有效规避突触塑性模拟中高漏电导致的非正常电流尖峰/毛刺。上述结果表明, 堆叠高k栅介质可以有效改善神经形态器件的漏电、功耗和性能, 为进一步开发超低功耗神经形态感知和计算系统提供了新的思路。

关键词: 神经形态器件, IGZO晶体管, 人造突触, 叠层栅介质, 高k栅介质, 突触可塑性

Abstract:

Indium-gallium-zinc-oxide (IGZO)-based electric-double-layer (EDL) transistors have great applications for neuromorphic perception and computing systems because of their low processing temperature, high homogeneity, and plentiful ionic dynamics. However, IGZO-based EDL transistors have problems of high leakage current (>10 nA), high energy consumption and abnormal current spikes, which are the main obstacles to the development of neuromorphic computing systems based on such devices. In this work, a novel IGZO neuromorphic transistor with Al₂O₃/chitosan stacked gate dielectric was proposed. Compared with the monolayer chitosan gate dielectric transistor, the device with Al₂O₃/chitosan layer showed low subthreshold swing of 78.3 mV/decade, a low gate leakage current of 1.3 nA (reduced by about 98%), a large hysteresis window of 3.73 V (increased by about 3.4 times), a low excitable postsynaptic current of 0.86 nA (decreased by about 97%) and an energy consumption of 1.7 pJ for a spike event (0.5 V, 20 ms). Additionally, the emulation of spiking synaptic function and the synergistically modulation of the channel current were also realized, and the abnormal current spike caused by high leakage in synaptic plasticity simulation was also effectively avoided. The results suggest that the inserting of high-k dielectric layer can effectively improve the leakage current, energy consumption and performance of neuromorphic devices, which has substantial value for future ultra-low energy consumption neuromorphic perception and computing systems.

Key words: neuromorphic device, IGZO-based transistor, artificial synapse, stacked gate dielectric, high-k dielectric, synaptic plasticity

中图分类号:

TN321

王靖瑜, 万昌锦, 万青. 基于Al₂O₃/Chitosan叠层栅介质的双栅IGZO神经形态晶体管[J]. 无机材料学报, 2023, 38(4): 445-451.

WANG Jingyu, WAN Changjin, WAN Qing. Dual-gate IGZO-based Neuromorphic Transistors with Stacked Al₂O₃/Chitosan Gate Dielectrics[J]. Journal of Inorganic Materials, 2023, 38(4): 445-451.

图/表 8

图1 基于不同介质的IGZO神经形态晶体管的结构图

Fig. 1 Schematic diagram of the IGZO-based neuromorphic transistor with different gate dielectrics (a) Chitosan gate dielectric; (b) Stacked Al2O3/chitosan gate dielectrics

图2 单层、双层栅介质的漏电流曲线及其AFM形貌(插图)

Fig. 2 Leakage current curves and corresponding AFM images (inset) of monolayer gate dielectric and bilayer gate dielectric (a) Chitosan solid dielectric; (b) Stacked Al2O3/chitosan bilayer gate dielectric (Inset: AFM image of Al2O3 membrane)

图3 两组不同结构IGZO晶体管的转移曲线和输出曲线

Fig. 3 Transfer characteristics and output characteristics of two kinds of dielectric devices (a,b) Transfer characteristics of chitosan dielectric device (a) and stacked Al2O3/chitosan bilayer gate dielectric device (b); (c) Output characteristic of chitosan dielectric device; (d) Output characteristic of stacked Al2O3/chitosan bilayer gate dielectric device

表1 两组IGZO神经形态晶体管的晶体管参数对比

Table 1 Transistor parameters of IGZO-based transistors

Gate dielectric	I_off	I_on/I_offratio	Subthreshold swing/ (mV·decade^-1)	Hysteresis window/V	Leakage current (V_G=1.8 V)/nA	μ_sat/ (cm²·V^-1·s^-1)
Chitosan	2.92×10^-9	1.06×10⁵	98.8	1.10	66.4	18.0
Chitosan/Al₂O₃	4.20×10^-11	2.20×10⁶	78.3	3.73	1.3	20.9

图4 晶体管的顶部光学显微镜照片(a), 在不同VG2下(范围为-2.0 V至1.0 V)的晶体管转移曲线(b)及不同VG2下的器件阈值电压变化(c)

Fig. 4 (a) Top micrograph, (b) transfer characteristics with different VG2 (from-2.0 V to 1.0 V) and (c) the Vth with different VG2 of transistor

图5 (a) 生物突触结构示意图以及叠层Al2O3/壳聚糖栅介质突触晶体管的等效电路图, (b) 0.5 V, 20 ms电脉冲下的两组器件的EPSC响应, (c) 叠层Al2O3/壳聚糖栅介质晶体管在不同振幅的电脉冲诱发的EPSC

Fig. 5 (a) Schematic diagram of biological synapse and their equivalent electrical circuit of the neuromorphic transistor, (b) EPSC responses under an electric pulse of 0.5 V, and (c) EPSC induced by electric pulses of different amplitudes for IGZO-based dual-gate transistor with stacked Al2O3/chitosan gate dielectrics

表2 不同结构的人工突触晶体管的EPSC能耗对比

Table 2 Energy consumption of the single EPSC peak in different artificial synaptic transistors

Structure	V_DS/V	V_G pulse	EPSC/nA	Energy consumption/(pJ·spike^-1)	Ref.
Nanogranular SiO₂/IZO	1.0	0.8 V, 20 ms	5000	10⁵	[33]
GO+Chitosan/IGZO	0.1	0.5 V, 20 ms	14	28	[34]
Carbon Nanotube (CNT)	0.5	4.0 V, 1.0 ms	15	7.5	[35]
Chitosan/IZO	0.1	0.5 V, 25 ms	2.6	6.5	[36]
Chitosan/IWO	0.1	0.2 V, 20 ms	4.7	9.4	[37]
Chitosan/IGZO	0.1	0.5 V, 20 ms	26	52	[38]
Tungsten oxide	0.3	0.6 V, 70 ms	3.8	79	[39]
Chitosan/ IGZO	0.1	0.5 V, 20 ms	24	48	This work
Chitosan/Al₂O₃/IGZO	0.1	0.5 V, 20 ms	0.86	1.7	This work

图6 叠层Al2O3/壳聚糖栅介质晶体管的(a)八个连续电脉冲(0.5 V, 25 ms)激发的多脉冲易化现象和(b) A8/A1的比值与脉冲时间间隔的关系图

Fig. 6 (a) Multi-pulse facilitation induced by eight successive electric pulse (0.5 V, 25 ms) and (b) ratio of A8/A1 plotted as a function of the time interval between the pulses for IGZO-based dual-gate transistor with stacked Al2O3/chitosan gate dielectrics

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基于Al₂O₃/Chitosan叠层栅介质的双栅IGZO神经形态晶体管

Dual-gate IGZO-based Neuromorphic Transistors with Stacked Al₂O₃/Chitosan Gate Dielectrics

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